Arnaud Tisserand, Lab-STICC, CNRS, Lorient
Slides in English and presentation in French (or English if required).
(Creative Commons Attribution – NonCommercial 4.0 International License.)
Processors and many electronic circuits have units dedicated to arithmetic computations such as addition/subtraction, multiplication or division. Some units are directly accessible in the instruction set of the processor while others are buried into different circuit blocks (e.g., memory address generation, cryptographic accelerator).
Designing arithmetic units requires to take into account different and
sometimes conflicting objectives and constraints: ensuring quality (e.g., good accuracy, overflow detection), providing fast operations, requiring small silicon area and small energy, or, in the case of embedded systems, reducing some vulnerabilities to physical attacks.
The first part of the conference will deal with efficiency. After a few
reminders on digital circuits design, I will present basic arithmetic units for
integer addition and multiplication. Then, I will introduce problems and
solution examples related to high-speed arithmetic circuits and energy
reduction. I will show how other representations of numbers help to perform more efficient computations.
The last part of the conference will deal with some security aspects related to physical attacks. First I will introduce attacks based on observation (i.e.,
side channel attacks) or perturbation (i.e., fault injection attacks) of the
circuit. Then I will present attack examples. Finally I will present
protection examples using “exotic” representations of numbers and adapted
algorithms and implementations.
During the conference, I will use historical and current examples from research results and industry to illustrate some points.